TERMIUM Plus^®

Fiche 1,  Justifications,  Anglais

Record number: 1, Textual support number: 1 DEF

The operation of writing data into a memory or storage device.  1, fiche 1, Anglais, - write%20cycle

Record number: 1, Textual support number: 1 CONT

In very simple systems, every instruction cycle starts with a read memory cycle where program memory drives the instruction onto the data bus... Some instructions continue with a write memory cycle where the memory data register drives data onto the data bus into the chosen RAM [random access memory] or I/O [input-output] device.  2, fiche 1, Anglais, - write%20cycle

Fiche 1,  Justifications,  Français

Fiche 1,  Justifications,  Espagnol

Record number: 1, Textual support number: 1 DEF

Fase durante la cual se produce una operación de escritura en la memoria.  3, fiche 1, Espagnol, - ciclo%20de%20escritura

Fiche 2,  Justifications,  Anglais

Record number: 2, Textual support number: 1 DEF

A program, either in a microprocessor or more usually in a separate input/output(I/O) controller, that directs traffic on the computer bus or input/output paths.  2, fiche 2, Anglais, - bus%20master

Fiche 2,  Justifications,  Français

Fiche 2,  Justifications,  Espagnol

Fiche 3,  Justifications,  Anglais

Record number: 3, Textual support number: 1 DEF

A video adapter that contains a graphics coprocessor to update the video display much more quickly than the CPU can and free the latter for other tasks.  2, fiche 3, Anglais, - graphics%20accelerator

Record number: 3, Textual support number: 1 CONT

Graphics accelerators speed things up by moving work off the processor, but they are often left hungry for data by the slow clock speed and narrow 16-bit data path of the ISA I/O bus.  3, fiche 3, Anglais, - graphics%20accelerator

Record number: 3, Textual support number: 2 CONT

The Compaq QVision 1024E EISA card flies past conventional VGA and graphics accelerator ...  4, fiche 3, Anglais, - graphics%20accelerator

Fiche 3,  Justifications,  Français

Record number: 3, Textual support number: 1 DEF

Dispositif assurant l'accélération du traitement des données, permettant la visualisation des courbes, des images et des dessins.  2, fiche 3, Français, - acc%C3%A9l%C3%A9rateur%20graphique

Record number: 3, Textual support number: 1 CONT

Le P86C805 est, en effet, un accélérateur graphique optimisé pour un environnement spécifique (Windows en l'occurrence).  3, fiche 3, Français, - acc%C3%A9l%C3%A9rateur%20graphique

Record number: 3, Textual support number: 2 CONT

En effet, depuis quelques mois est apparue la nouvelle génération de circuits vidéo : les accélérateurs graphiques.  3, fiche 3, Français, - acc%C3%A9l%C3%A9rateur%20graphique

Fiche 3,  Justifications,  Espagnol

Fiche 4,  Justifications,  Anglais

Record number: 4, Textual support number: 1 DEF

RESet signal (acronym, pronounce letter individually)  2, fiche 4, Anglais, - reset%20signal

Record number: 4, Textual support number: 1 CONT

... the signal ALE(address latch enable), as well as the signals RD(READ), WR(WRITE), I/O/M... and, finally, the reset signal RES(used to set the contents of the internal registers to O), are derived from the control bus.  3, fiche 4, Anglais, - reset%20signal

Fiche 4,  Justifications,  Français

Record number: 4, Textual support number: 1 CONT

En se déplaçant [...] vers la droite, on s'aperçoit que le signal de validation du latch d'adresse ALE, aussi bien que les signaux RD (LECTURE), WR (ÉCRITURE), I/O/M [...] et, enfin, le signal de remise à zéro RES (qui sert à remettre à zéro le contenu des registres internes), sont recueillis sur le bus de commande.  1, fiche 4, Français, - signal%20de%20remise%20%C3%A0%20z%C3%A9ro

Fiche 4,  Justifications,  Espagnol

Fiche 5,  Justifications,  Anglais

Record number: 5, Textual support number: 1 CONT

The interconnection of many computers is often used in applying industrial robots to an assembly line. A usual form of interconnect in these systems is loosely coupled, wherein each processor has its own local memory and the processors communicate via a special I/O channel.... Each of the three processors has a local bus with a local memory. Other items(such as sensors, effectors, and mass storage devices) may also be connected to the buses of each processor.  1, fiche 5, Anglais, - local%20bug

Fiche 5,  Justifications,  Français

Record number: 5, Textual support number: 1 OBS

Voir bogue et bogue conceptuelle.  1, fiche 5, Français, - bogue%20locale

Fiche 5,  Justifications,  Espagnol

Fiche 6,  Justifications,  Anglais

Record number: 6, Textual support number: 1 CONT

The inter-connection of many computers is often used in applying industrial robots to an assembly line. A usual form of interconnect in these systems is loosely coupled, where in each processor has its own local memory and the processor communicate via a special I/O channel. Each of the... processors has a local bus with a local memory. Other items... may also be connected to the bases of each processor. The Interprocessor Communications bus carries messages between the processors.  1, fiche 6, Anglais, - Interprocessor%20Communications%20Bus

Fiche 6,  Justifications,  Français

Fiche 6,  Justifications,  Espagnol

Fiche 7,  Justifications,  Anglais

Record number: 7, Textual support number: 1 OBS

In some computers the information goes through a separate I/O bus, which can be a simpler bus because the information rate is much slower and there are fewer addresses.  1, fiche 7, Anglais, - input%2Doutput%20bus

Record number: 7, Textual support number: 2 OBS

"Microcomputers: the second wave".  1, fiche 7, Anglais, - input%2Doutput%20bus

Fiche 7,  Justifications,  Français

Fiche 7,  Justifications,  Espagnol